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公开(公告)号：US12184405B2
公开(公告)日：2024-12-31
申请号：US17360817
申请日：2021-06-28
Applicant: Huawei Technologies Co., Ltd.
Inventor： Jingfei Lv , Song Liu , Chuan Xu
Abstract: This application discloses a clock synchronization method and apparatus, and a storage medium, which pertains to the field of communication technologies. The method includes: first receiving, by a network device, an announce packet from a first master clock node and an announce packet from a second master clock node, when an identifier of a first clock source node carried in the announce packet from the first master clock node is the same as an identifier of a second clock source node carried in the announce packet from the second master clock node, selecting a master clock node with a relatively small clock deviation, and then calibrating a clock of the network device based on time information of the master clock node. In this application, precision of clock synchronization performed by the network device is higher, and further, precision of a clock calibrated by the network device is higher.
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公开(公告)号：US10412697B2
公开(公告)日：2019-09-10
申请号：US15794904
申请日：2017-10-26
Applicant: Huawei Technologies Co., Ltd.
Abstract: A time synchronization method and system, and a network device, where the method includes receiving, by a second network device, a first packet from a first network device, where the first packet includes a first service frame and a first time stamp (T1), the first service frame carries a system clock of a radio equipment control (REC), obtaining, the system clock of the REC according to the first packet, sending, according to the system clock of the REC, the first service frame extracted from the first packet to a radio equipment (RE), recording a second time stamp (T2) at which the first service frame is sent, and determining, by the second network device, a transmission delay (T) according to T=T2−T1. Hence, a delay between the REC and the RE remains unchanged.
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公开(公告)号：US11038608B2
公开(公告)日：2021-06-15
申请号：US16401996
申请日：2019-05-02
Applicant: Huawei Technologies Co., Ltd.
Inventor： Jingfei Lv , Jinhui Wang , Chuan Xu
IPC: H04J3/06
Abstract: A frequency synchronization method includes: receiving, by a slave clock, a first pulse signal and a second pulse signal; determining, by the slave clock based on a first phase difference, a second phase difference, a first delay, and a second delay, that a frequency offset of the slave clock relative to the master clock is equal to a first frequency offset, where the first phase difference is a difference between a phase of a third pulse signal generated by the slave clock and a phase of the first pulse signal received by the slave clock, and the second phase difference is a difference between a phase of a fourth pulse signal generated by the slave clock and a phase of the second pulse signal received by the slave clock; and calibrating, by the slave clock, frequency of the slave clock based on the first frequency offset.
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公开(公告)号：US10291446B2
公开(公告)日：2019-05-14
申请号：US15965362
申请日：2018-04-27
Applicant: Huawei Technologies Co., Ltd.
Abstract: A clock synchronization method, a receiver, a transmitter, and a clock synchronization system, where the method includes obtaining a common reference clock signal, determining Bt according to the common reference clock signal and Mrd(t−1), where B t = mod [ ∑ n = 0 t - 1 Mr d ( n ) , 2 p ] , determining that Mrd(t−1) is a target Mrd when Ct obtained by means of calculation according to Mrd(t−1) is less than or equal to a threshold, where Ct=Bt−At, At is included in a residual time stamp (RTS) packet received by a receiver last time from the transmitter, and A t = mod [ ∑ n = 0 t M d ( n ) , 2 p ] , performing frequency division on the common reference clock signal using the target Mrd as a frequency dividing coefficient to obtain a first clock signal, and performing frequency multiplication processing on the first clock signal to obtain a service clock signal. Hence, random phase offset may be avoided.
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公开(公告)号：US11095383B2
公开(公告)日：2021-08-17
申请号：US16455721
申请日：2019-06-27
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Jinhui Wang , Chuan Xu
Abstract: A method for exchanging a clock synchronization packet performed by a network apparatus, including: exchanging a clock synchronization packet with a first clock source, where the network apparatus includes a boundary clock; determining a first time deviation of the boundary clock relative to the first clock source according to the clock synchronization packet exchanged with the first clock source, where the boundary clock avoids performing an operation of calibrating a time of a local clock of the boundary clock according to the first time deviation; and sending a clock synchronization packet to a first slave clock of the boundary clock, where the clock synchronization packet includes a first timestamp, a value of the first timestamp is equal to a first corrected value, and the first corrected value is a value obtained by the boundary clock by correcting the time of the local clock by using the first time deviation.
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Patent Agency Ranking
公开(公告)号：US20180248721A1
公开(公告)日：2018-08-30
申请号：US15965362
申请日：2018-04-27
Applicant: Huawei Technologies Co., Ltd.
CPC classification number: H04L27/0014 , H04J3/0632 , H04J3/0658 , H04L7/0012 , H04L7/0037 , H04L2027/0048 , H04Q11/0478
Abstract: A clock synchronization method, a receiver, a transmitter, and a clock synchronization system, where the method includes obtaining a common reference clock signal, determining Bt according to the common reference clock signal and Mrd(t−1), where B t = mod [ ∑ n = 0 t - 1 Mr d ( n ) , 2 p ] , determining that Mrd(t−1) is a target Mrd when Ct obtained by means of calculation according to Mrd(t−1) is less than or equal to a threshold, where Ct=Bt−At, At is included in a residual time stamp (RTS) packet received by a receiver last time from the transmitter, and A t = mod [ ∑ n = 0 t M d ( n ) , 2 p ] , performing frequency division on the common reference clock signal using the target Mrd as a frequency dividing coefficient to obtain a first clock signal, and performing frequency multiplication processing on the first clock signal to obtain a service clock signal. Hence, random phase offset may be avoided.
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公开(公告)号：US11811501B2
公开(公告)日：2023-11-07
申请号：US17360059
申请日：2021-06-28
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Jingfei Lv , Song Liu , Chuan Xu
IPC: H04J3/06
CPC classification number: H04J3/0644 , H04J3/0641 , H04J3/0658 , H04J3/0679
Abstract: This application discloses a clock synchronization method and apparatus, and related storage medium, and pertains to the field of communications technologies. A network device receives an announce message from a first master clock node and an announce message from a second master clock node; and when an identifier of a first clock source node carried in the announce message of the first master clock node is the same as an identifier of a second clock source node carried in the announce message of the second master clock node, selects a master clock node with a smaller clock deviation from the first master clock node and the second master clock node, and then calibrates a clock of the network device based on time information of the master clock node. The precision of clock synchronization by the network device is improved.
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公开(公告)号：US11606155B2
公开(公告)日：2023-03-14
申请号：US17374108
申请日：2021-07-13
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Jinhui Wang , Chuan Xu
Abstract: A method for exchanging a clock synchronization packet performed by a network apparatus, including: exchanging a clock synchronization packet with a first clock source, where the network apparatus includes a boundary clock; determining a first time deviation of the boundary clock relative to the first clock source according to the clock synchronization packet exchanged with the first clock source, where the boundary clock avoids performing an operation of calibrating a time of a local clock of the boundary clock according to the first time deviation; and sending a clock synchronization packet to a first slave clock of the boundary clock, where the clock synchronization packet includes a first timestamp, a value of the first timestamp is equal to a first corrected value, and the first corrected value is a value obtained by the boundary clock by correcting the time of the local clock by using the first time deviation.
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公开(公告)号：US11171769B2
公开(公告)日：2021-11-09
申请号：US16914453
申请日：2020-06-28
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Xingjian Shi , Jinhui Wang , Chuan Xu
Abstract: In various embodiments, a method is provided. In this method, a first signal is received from a master node, and is sampled to obtain a first sample. The first sample is then quantized to obtain a quantized form of the first sample. A first synchronization sequence is detected from the quantized form of the first sample at T2. First information is received from the master node and the first information is used to indicate a moment T1 at which the master node sends the first synchronization sequence. A second synchronization sequence is sent to the master node at T3. Second information received from the master node and the second information is used to indicate a moment T4 at which the master node detects a quantized form of the second synchronization sequence. Time synchronization is performed based on T1, T2, T3, and T4.
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公开(公告)号：US20200328872A1
公开(公告)日：2020-10-15
申请号：US16914453
申请日：2020-06-28
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Xingjian Shi , Jinhui Wang , Chuan Xu
Abstract: In various embodiments, a method is provided. In this method, a first signal is received from a master node, and is sampled to obtain a first sample. The first sample is then quantized to obtain a quantized form of the first sample. A first synchronization sequence is detected from the quantized form of the first sample at T2. First information is received from the master node and the first information is used to indicate a moment T1 at which the master node sends the first synchronization sequence. A second synchronization sequence is sent to the master node at T3. Second information received from the master node and the second information is used to indicate a moment T4 at which the master node detects a quantized form of the second synchronization sequence. Time synchronization is performed based on T1, T2, T3, and T4.
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