Invention Grant
- Patent Title: Semiconductor device including first and second wirings
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Application No.: US15861261Application Date: 2018-01-03
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Publication No.: US10297547B2Publication Date: 2019-05-21
- Inventor: Yuji Kayashima , Tomohisa Sekiguchi
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McGinn IP Law Group, PLLC.
- Priority: JP2017-035049 20170227
- Main IPC: H01L23/528
- IPC: H01L23/528 ; H01L23/00

Abstract:
A wiring is formed over a semiconductor substrate via an interlayer insulation film, and another interlayer insulation film is formed over the interlayer insulation film so as to cover the wiring, and a pad is formed over the another interlayer insulation film. Over the another interlayer insulation film, a layered film having an opening portion in which a pad is exposed is formed, and a redistribution wiring electrically connected to the pad is formed over the layered film and over the pad exposed in the opening portion. An end portion of the wiring is located below a connection region between the pad and the redistribution wiring. The wiring has a plurality of opening portions formed therein, and at least a part of the plurality of opening portions overlaps with the connection region in plan view.
Public/Granted literature
- US20180247893A1 SEMICONDUCTOR DEVICE Public/Granted day:2018-08-30
Information query
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