Invention Grant
- Patent Title: Methods and systems for improving power delivery and signaling in stacked semiconductor devices
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Application No.: US16115492Application Date: 2018-08-28
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Publication No.: US10304809B2Publication Date: 2019-05-28
- Inventor: Anthony D. Veches
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Perkins Coie LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L25/065 ; H01L25/00 ; H01L23/64

Abstract:
Semiconductor die assemblies including stacked semiconductor dies having parallel plate capacitors formed between adjacent pairs of semiconductor dies in the stack, and associated systems and methods, are disclosed herein. In one embodiment, a semiconductor die assembly includes a first semiconductor die and a second semiconductor die stacked over the first semiconductor die. The first semiconductor die includes an upper surface having a first capacitor plate formed thereon, and the second semiconductor die includes a lower surface facing the upper surface of the first semiconductor die and having a second capacitor plate formed thereon. A dielectric material is formed at least partially between the first and second capacitor plates. The first capacitor plate, second capacitor plate, and dielectric material together form a capacitor that stores charge locally within the stack, and that can be accessed by the first and/or second semiconductor dies.
Public/Granted literature
- US20190067252A1 METHODS AND SYSTEMS FOR IMPROVING POWER DELIVERY AND SIGNALING IN STACKED SEMICONDUCTOR DEVICES Public/Granted day:2019-02-28
Information query
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