Invention Grant
- Patent Title: Alteration of a signal value for an FPGA at runtime
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Application No.: US14823197Application Date: 2015-08-11
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Publication No.: US10311193B2Publication Date: 2019-06-04
- Inventor: Heiko Kalte , Lukas Funke
- Applicant: dSPACE digital signal processing and control engineering GmbH
- Applicant Address: DE Paderborn
- Assignee: dSPACE digital signal processing and control engineering GmbH
- Current Assignee: dSPACE digital signal processing and control engineering GmbH
- Current Assignee Address: DE Paderborn
- Agency: Muncy, Geissler, Olds & Lowe, P.C.
- Priority: DE102013101300 20130211; EP13154741 20130211
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A method for changing a signal value of an FPGA at runtime, including the steps of loading an FPGA hardware configuration with at least one signal value onto the FPGA, running the FPGA hardware configuration on the FPGA, setting the signal value for transfer to the FPGA, determining writeback data from the signal value, writing the writeback data as status data to a configuration memory of the FPGA, and transferring the status data from the configuration memory to the functional level of the FPGA. A method is also provided for performing an FPGA build, including the steps of creating an FPGA hardware configuration with a plurality of signal values, arranging signal values in adjacent areas of the FPGA hardware configuration, ascertaining memory locations of a configuration memory for status data of the plurality of signal values on the basis of the FPGA hardware configuration, and creating a list containing signal values.
Public/Granted literature
- US20150347669A1 ALTERATION OF A SIGNAL VALUE FOR AN FPGA AT RUNTIME Public/Granted day:2015-12-03
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