Invention Grant
- Patent Title: Gate control for a tristate output buffer
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Application No.: US15635924Application Date: 2017-06-28
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Publication No.: US10312912B2Publication Date: 2019-06-04
- Inventor: Christopher Michael Graves
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Lawrence J. Bassuk; Charles A. Brill; Frank D. Cimino
- Main IPC: H03K19/0185
- IPC: H03K19/0185 ; H03K19/00 ; H03K17/16

Abstract:
A gate control circuit for a tristate output buffer operating in a first voltage domain includes a pull-up circuit coupled between an upper rail and a first gate control signal, a pull-down circuit coupled between a lower rail and a second gate control signal, and a gate isolation switch coupled between the first gate control signal and the second gate control signal. The gate isolation switch includes a first PMOS transistor coupled in parallel with a first NMOS transistor. The first NMOS transistor is controlled by a first enable signal and the first PMOS transistor is controlled by a second enable signal.
Public/Granted literature
- US20190007046A1 GATE CONTROL FOR A TRISTATE OUTPUT BUFFER Public/Granted day:2019-01-03
Information query
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