- 专利标题： Encapsulated damascene interconnect structure for integrated circuits
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申请号： US13629411申请日： 2012-09-27
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公开(公告)号： US10319630B2公开(公告)日： 2019-06-11
- 发明人: John H. Zhang , Lawrence A. Clevenger , Carl Radens , Yiheng Xu
- 申请人： STMicroelectronics, Inc. , International Business Machines Corporation
- 申请人地址： US TX Coppell US NY Armonk
- 专利权人： STMICROELECTRONICS, INC.,INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人： STMICROELECTRONICS, INC.,INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人地址： US TX Coppell US NY Armonk
- 代理机构： Seed IP Law Group LLP
- 主分类号： H01L23/48
- IPC分类号： H01L23/48 ; H01L23/52 ; H01L21/768 ; H01L23/522 ; H01L23/532
摘要：
A plurality of metal tracks are formed in a plurality of intermetal dielectric layers stacked in an integrated circuit die. Thin protective dielectric layers are formed around the metal tracks. The protective dielectric layers act as a hard mask to define contact vias between metal tracks in the intermetal dielectric layers.
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