Invention Grant
- Patent Title: Layout technique for middle-end-of-line
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Application No.: US15628909Application Date: 2017-06-21
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Publication No.: US10325845B2Publication Date: 2019-06-18
- Inventor: Tin Tin Wee , Trilochan Sahoo , Sunil Sukumarapillai , Arun Kumar Kodigenahalli Venkateswar
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Loza & Loza, LLP/Qualcomm
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L29/78 ; H01L27/088 ; H01L29/417

Abstract:
In certain aspects of the disclosure, a die includes one or more fins, a gate formed over a first portion of the one or more fins, and a first source/drain contact formed over a second portion of the one or more fins, wherein the first source/drain contact includes an extended portion that does not overlap the one or more fins. The die also includes first and second metal lines formed from a first metal layer, wherein the first and second metal lines are spaced apart. The die further includes a first via connecting the first source/drain contact to the first metal line, and a second via connecting the first source/drain contact to the second metal line, wherein the second via lies within the extended portion of the first source/drain contact.
Public/Granted literature
- US20180374792A1 LAYOUT TECHNIQUE FOR MIDDLE-END-OF-LINE Public/Granted day:2018-12-27
Information query
IPC分类: