Invention Grant
- Patent Title: Fabrication method of semiconductor structure
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Application No.: US15645560Application Date: 2017-07-10
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Publication No.: US10325872B2Publication Date: 2019-06-18
- Inventor: Yi-Cheih Chen , Sung-Huan Sun , Cheng-An Chang , Chien-Hung Wu , Fu-Tang Huang
- Applicant: Siliconware Precision Industries Co., Ltd.
- Applicant Address: TW Taichung
- Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee Address: TW Taichung
- Agency: Mintz Levin Cohn Ferris Glovsky and Popeo, P.C.
- Agent Peter F. Corless; Steven M. Jensen
- Priority: TW103146514A 20141231
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L23/00

Abstract:
The present invention provides a semiconductor structure and a method of fabricating the same. The method includes: providing a chip having conductive pads, forming a metal layer on the conductive pads, forming a passivation layer on a portion of the metal layer, and forming conductive pillars on the metal layer. Since the metal layer is protected by the passivation layer, the undercut problem is solved, the supporting strength of the conductive pillars is increased, and the product reliability is improved.
Public/Granted literature
- US20170309585A1 FABRICATION METHOD OF SEMICONDUCTOR STRUCTURE Public/Granted day:2017-10-26
Information query
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