- Patent Title: Memory block usage based on block location relative to array edge
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Application No.: US15992229Application Date: 2018-05-30
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Publication No.: US10332608B2Publication Date: 2019-06-25
- Inventor: Yael Shur , Assaf Shappir , Barak Baum , Roman Guy , Michael Tsohar
- Applicant: Apple Inc.
- Applicant Address: US CA Cupertino
- Assignee: APPLE INC.
- Current Assignee: APPLE INC.
- Current Assignee Address: US CA Cupertino
- Agency: Kligler & Associates
- Main IPC: G11C16/34
- IPC: G11C16/34 ; G11C16/10 ; G11C16/08

Abstract:
A storage device includes storage circuitry and multiple memory blocks. The multiple memory blocks are arranged in an array, and each of the memory blocks includes multiple memory cells. A maximal number of programming cycles that a memory block of the multiple memory blocks sustains depends on a distance of the memory block from an edge of the array. The storage circuitry is configured to apply to the memory blocks programming cycles so that a number of programming cycles that can be applied to a respective memory block is based on a respective distance of the respective memory block from the edge of the array.
Public/Granted literature
- US20180358103A1 MEMORY BLOCK USAGE BASED ON BLOCK LOCATION RELATIVE TO ARRAY EDGE Public/Granted day:2018-12-13
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