Invention Grant
- Patent Title: Area-efficient and robust electrostatic discharge circuit
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Application No.: US15073950Application Date: 2016-03-18
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Publication No.: US10332871B2Publication Date: 2019-06-25
- Inventor: Christian Cornelius Russ , Giuseppe Curello , Tomasz Biedrzycki , Franz Kuttner , Luis F. Giles , Bernhard Stein
- Applicant: Intel IP Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel IP Corporation
- Current Assignee: Intel IP Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Green, Howard & Mughal LLP
- Main IPC: H01L27/02
- IPC: H01L27/02 ; H01L23/367 ; H01L23/50 ; H01L23/522 ; H01L49/02 ; H01L27/06 ; H01L27/092 ; H02H9/04

Abstract:
Described is an apparatus which comprises: a pad; a first transistor coupled in series with a second transistor and coupled to the pad; and a self-biasing circuit to bias the first transistor such that the first transistor is to be weakly biased during an electrostatic discharge (ESD) event. Described is also an apparatus which comprises: a first transistor; and a first local ballast resistor formed of a trench contact (TCN) layer, the first local ballast resistor having a first terminal coupled to either the drain or source terminal of the first transistor.
Public/Granted literature
- US20170271322A1 AREA-EFFICIENT AND ROBUST ELECTROSTATIC DISCHARGE CIRCUIT Public/Granted day:2017-09-21
Information query
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