Invention Grant
- Patent Title: Semiconductor device and method for manufacturing the same
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Application No.: US15912099Application Date: 2018-03-05
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Publication No.: US10332993B2Publication Date: 2019-06-25
- Inventor: Kazuhisa Mori
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McGinn IP Law Group, PLLC.
- Priority: JP2017-093094 20170509
- Main IPC: H01L27/06
- IPC: H01L27/06 ; H01L27/07 ; H01L29/06 ; H01L29/10 ; H01L29/78 ; H01L23/495 ; H01L29/423 ; H01L21/8234

Abstract:
A semiconductor device with a simplified structure including an energization control element and reverse coupling protection element, and a manufacturing method therefor. Its semiconductor substrate has deep and shallow trenches in its first surface. A first n-type impurity region lies in its second surface in contact with the deep trench bottom. A p-type impurity region includes: a p-type base region to make a pn junction with the first n-type region and in contact with the shallow trench bottom; and a back gate region joined to the p-type base region, lying in the first surface. A second n-type impurity region makes a pn junction with the p-type impurity region, lying in the first surface in contact with the shallow trench side face. An n+ source region makes a pn junction with the p-type region, lying in the first surface in contact with the side faces of deep and shallow trenches.
Public/Granted literature
- US20180331210A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2018-11-15
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