A display panel driving unit can include: a timing controller to supply a power on reset signal for starting a sensing operation for pixel compensation during a sensing period before displaying an image; a power management integrated circuit (PMIC) to supply a high level reference voltage reset signal to the timing controller, and generate a control signal; and a control circuit to receive the high level reference voltage reset signal and the PMIC, in response to the high level reference voltage reset signal transitioning from a high to low logic level and then from the low logic level back to the high logic level, shift the power on reset signal to transition from a high to low logic level and then from the low logic level back to high, to follow the high level reference voltage reset signal, and supply the power on reset signal to the timing controller.