A hardware system is disclosed for active-core-based performance boost. In an example aspect, the hardware system includes multiple cores and a power mode manager. Each core can be powered up if active or powered down if inactive. The power mode manager manages a power mode collection including an independent power mode collection and an active-core-dependent power mode collection. The power mode manager includes a software-accessible power mode manager and a hardware-reserved power mode manager. The software-accessible power mode manager provides a power-mode-triggering pathway to enable software to trigger activation of an independent power mode of the independent power mode collection. The hardware-reserved power mode manager excludes the software from being able to trigger activation of a dependent power mode of the active-core-dependent power mode collection and triggers activation of a dependent power mode of the active-core-dependent collection based on a number of active cores of the multiple cores.