Invention Grant
- Patent Title: Method and structure for mandrel and spacer patterning
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Application No.: US15191916Application Date: 2016-06-24
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Publication No.: US10361286B2Publication Date: 2019-07-23
- Inventor: Chi-Che Tseng , Chen-Yuan Wang , Wilson Hsieh , Yi-Hung Lin , Chung-Li Huang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/66
- IPC: H01L29/66 ; G03F1/38 ; H01L21/8234 ; H01L21/66

Abstract:
An IC manufacturing method includes forming first mandrels and second mandrels over a substrate; and forming first spacers on sidewalls of the first mandrels and second spacers on sidewalls of the second mandrels. Each of the first and second spacers has a loop structure with two curvy portions connected by two lines. The method further includes removing the first and second mandrels; and removing the curvy portions from each of the first spacers without removing the curvy portions from the second spacers. The second spacers are used for monitoring variations of the IC fabrication processes.
Public/Granted literature
- US20170372974A1 Method and Structure for Mandrel and Spacer Patterning Public/Granted day:2017-12-28
Information query
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