Invention Grant
- Patent Title: Structure and formation method of interconnection structure of semiconductor device
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Application No.: US15492603Application Date: 2017-04-20
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Publication No.: US10373906B2Publication Date: 2019-08-06
- Inventor: Jyh-Nan Lin , Tsung-Dar Lee , Li Chen
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L21/768 ; H01L21/02 ; H01L23/532

Abstract:
Structures and formation methods of a semiconductor device structure are provided. A method includes depositing a first layer including Al atoms to cover a first dielectric layer in a first conductive feature. The method also includes depositing a second layer including N atoms over the first layer. The first layer and the second layer form an etch stop layer including aluminum nitride. The etch stop layer includes vacancies and has an atomic percentage of Al to Al and N. The method also includes filling the vacancies in the etch stop layer with additional N atoms to reduce the atomic percentage of Al to Al and N. In addition, the method includes forming a second dielectric layer over the etch stop layer. The method also includes forming a second conductive feature in the second dielectric layer and the etch stop layer to be connected to the first conductive feature.
Public/Granted literature
- US20180308793A1 STRUCTURE AND FORMATION METHOD OF INTERCONNECTION STRUCTURE OF SEMICONDUCTOR DEVICE Public/Granted day:2018-10-25
Information query
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