Invention Grant
- Patent Title: Heterojunction bipolar transistor
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Application No.: US15598456Application Date: 2017-05-18
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Publication No.: US10374071B2Publication Date: 2019-08-06
- Inventor: Yasunari Umemoto , Shigeki Koya , Shigeru Yoshida , Isao Obu
- Applicant: MURATA MANUFACTURING CO., LTD.
- Applicant Address: JP Kyoto-fu
- Assignee: MURATA MANUFACTURING CO., LTD.
- Current Assignee: MURATA MANUFACTURING CO., LTD.
- Current Assignee Address: JP Kyoto-fu
- Agency: Studebaker & Brackett PC
- Priority: JP2016-136965 20160711
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/73 ; H01L29/737 ; H01L29/02 ; H01L31/109 ; H01L29/36 ; H01L31/072 ; H01L29/08 ; H01L29/15 ; H01L21/02 ; H01L21/331

Abstract:
A heterojunction bipolar transistor includes a collector layer, a base layer, an emitter layer, and a semiconductor layer that are laminated in this order, wherein the emitter layer includes a first region having an upper surface on which the semiconductor layer is laminated, and a second region being adjacent to the first region and having an upper surface that is exposed, and the first and second regions of the emitter layer have higher doping concentrations in portions near the upper surfaces than in portions near an interface between the emitter layer and the base layer.
Public/Granted literature
- US20180012979A1 HETEROJUNCTION BIPOLAR TRANSISTOR Public/Granted day:2018-01-11
Information query
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