Invention Grant
- Patent Title: Semiconductor package and method for fabricating the same
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Application No.: US15428124Application Date: 2017-02-08
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Publication No.: US10381301B2Publication Date: 2019-08-13
- Inventor: Shing-Yih Shih
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micro Technology, Inc.
- Current Assignee: Micro Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: TraskBritt
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L23/00 ; H01L21/48 ; H01L25/065 ; H01L25/00 ; H01L23/31 ; H01L21/56 ; H01L21/683

Abstract:
A semiconductor package including at least one semiconductor device, a first redistribution layer, a first molding compound, a second molding compound, conductive vias and a second redistribution layer. The first redistribution layer is disposed beneath the semiconductor device and electrically connected to the semiconductor device. The first molding compound is disposed over the first redistribution layer and surrounds the semiconductor device. The second molding compound surrounds the first redistribution layer and at least a part of the first molding compound. The conductive vias extend through the second molding compound. The second redistribution layer is disposed on a surface of the second molding compound away from the first redistribution layer. The second redistribution layer is electrically connected to the first redistribution layer through the conductive vias.
Public/Granted literature
- US20180226333A1 SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME Public/Granted day:2018-08-09
Information query
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