Invention Grant
- Patent Title: Power transistor having perpendicularly-arranged field plates and method of manufacturing the same
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Application No.: US15653639Application Date: 2017-07-19
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Publication No.: US10381477B2Publication Date: 2019-08-13
- Inventor: Andreas Peter Meiser , Till Schloesser
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Murphy, Bilak & Homiller, PLLC
- Priority: DE102016113393 20160720
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/10 ; H01L29/40 ; H01L29/66 ; H01L29/78 ; H01L29/417

Abstract:
A semiconductor device in a semiconductor substrate having a first main surface includes a transistor array and a termination region. The transistor array includes a source region, a drain region, a body region, a drift zone, and a gate electrode at the body region. The gate electrode is configured to control a conductivity of a channel in the body region. The body region and the drift zone are disposed along a first horizontal direction between the source region and the drain region. The transistor array further includes first field plate trenches in the drift zone. A longitudinal axis of the first field plate trenches extends in the first horizontal direction. The semiconductor device further includes a second field plate trench, a longitudinal axis of the second field plate trench extending in a second horizontal direction perpendicular to the first direction.
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