Invention Grant
- Patent Title: Buffer circuit with adaptive repair capability
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Application No.: US15506621Application Date: 2015-08-17
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Publication No.: US10388396B2Publication Date: 2019-08-20
- Inventor: Scott C. Best , John Eric Linstadt , Paul William Roukema
- Applicant: Rambus Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: Rambus Inc.
- Current Assignee: Rambus Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Peninsula Patent Group
- Agent Lance Kreisman
- International Application: PCT/US2015/045495 WO 20150817
- International Announcement: WO2016/032784 WO 20160303
- Main IPC: G11C29/00
- IPC: G11C29/00 ; G11C29/44 ; G11C5/04 ; G11C11/401 ; G11C29/02 ; G11C29/52

Abstract:
A buffer circuit is disclosed. The buffer circuit includes a command address (C/A) interface to receive an incoming activate (ACT) command and an incoming column address strobe (CAS) command. A first match circuit includes first storage to store failure row address information associated with the memory, and first compare logic. The first compare logic is responsive to the ACT command, to compare incoming row address information to the stored failure row address information. A second match circuit includes second storage to store failure column address information associated with the memory, and second compare logic. The second compare logic is responsive to the CAS command, to compare the incoming column address information to the stored failure column address information. Gating logic maintains a state of a matching row address identified by the first compare logic during the comparison carried out by the second compare logic.
Public/Granted literature
- US20170287571A1 BUFFER CIRCUIT WITH ADAPTIVE REPAIR CAPABILITY Public/Granted day:2017-10-05
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