Invention Grant
- Patent Title: Method to compute sliding window block sum using instruction based selective horizontal addition in vector processor
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Application No.: US16291405Application Date: 2019-03-04
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Publication No.: US10395381B2Publication Date: 2019-08-27
- Inventor: Jayasree Sankaranarayanan , Dipan Kumar Mandal
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Kenneth Liu; Charles A. Brill; Frank D. Cimino
- Priority: IN5508/CHE/2014 20141103
- Main IPC: G06T7/60
- IPC: G06T7/60 ; G06F9/38 ; G06F9/30 ; G06T1/20 ; G06F17/16
Abstract:
Disclosed techniques relate to forming a block sum of picture elements employing a vector dot product instruction to sum packed picture elements and the mask producing a vector of masked horizontal picture element. The block sum is formed from plural horizontal sums via vector single instruction multiple data (SIMD) addition.
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