Invention Grant
- Patent Title: Semiconductor process
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Application No.: US15409434Application Date: 2017-01-18
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Publication No.: US10395997B2Publication Date: 2019-08-27
- Inventor: Yu-Cheng Tsao , Cheng-Hung Wang , Chun-Chieh Lin , Hsiu-Hsiung Yang , Yu-Pin Tsai
- Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Applicant Address: TW Kaosiung
- Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee Address: TW Kaosiung
- Agency: Foley & Lardner LLP
- Agent Cliff Z. Liu
- Priority: TW102140733A 20131108
- Main IPC: H01L21/66
- IPC: H01L21/66 ; H01L21/683 ; H01L21/78 ; H01L23/00
Abstract:
The present disclosure relates to a semiconductor process, which includes: (a) providing a semiconductor element; (b) attaching the semiconductor element to a carrier by an adhesive layer, so that the adhesive layer is sandwiched between the semiconductor element and the carrier; and (c) cutting the semiconductor element to form a plurality of semiconductor units. Thereby, the gaps between the semiconductor units are fixed after the cutting process, so as to facilitate testing the semiconductor units.
Public/Granted literature
- US20170125310A1 SEMICONDUCTOR PROCESS Public/Granted day:2017-05-04
Information query
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