Invention Grant
- Patent Title: Test structure macro for monitoring dimensions of deep trench isolation regions and local trench isolation regions
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Application No.: US14789476Application Date: 2015-07-01
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Publication No.: US10396000B2Publication Date: 2019-08-27
- Inventor: Tenko Yamashita , Chun-Chen Yeh , Hui Zang
- Applicant: International Business Machines Corporation , Globalfoundries, Inc.
- Applicant Address: US NY Armonk KY
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION,GLOBALFOUNDRIES, INC.
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION,GLOBALFOUNDRIES, INC.
- Current Assignee Address: US NY Armonk KY
- Agency: Cantor Colburn LLP
- Agent Vazken Alexanian
- Main IPC: H01L21/66
- IPC: H01L21/66 ; H01L29/66 ; H01L21/8234 ; H01L27/088

Abstract:
Embodiments are directed to a method Embodiments are directed to a test structure of a fin-type field effect transistor (FinFET). The test structure includes a first conducting layer electrically coupled to a dummy gate of the FinFET, and a second conducting layer electrically coupled to a substrate of the FinFET. The test structure further includes a third conducting layer electrically coupled to the dummy gate of the FinFET, and a first region of the FinFET at least partially bound by the first conducting layer and the second conducting layer. The test structure further includes a second region of the FinFET at least partially bound by the second conducting layer and the third conducting layer, wherein the first region comprises a first dielectric having a first dimension, and wherein the second region comprises a second dielectric having a second dimension greater than the first dimension.
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