Invention Grant
- Patent Title: Robust through-silicon-via structure
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Application No.: US15859872Application Date: 2018-01-02
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Publication No.: US10396014B2Publication Date: 2019-08-27
- Inventor: Yung-Chi Lin , Tsang-Jiuh Wu , Wen-Chih Chiou
- Applicant: Taiwan Semiconductor Manufacturing Co Ltd
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company
- Current Assignee: Taiwan Semiconductor Manufacturing Company
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/768

Abstract:
Methods and apparatus entailing an interconnect structure comprising interconnect features disposed in dielectric material over a substrate. Each interconnect feature comprises an interconnect member and a via extending between the interconnect member and a conductive member formed within the dielectric material. A through-silicon-via (TSV) structure is formed laterally offset from the interconnect structure by forming a first portion of the TSV structure with a first conductive material and forming a second portion of the TSV structure with a second conductive material. Forming the second portion of the TSV structure occurs substantially simultaneously with forming one of the interconnect features.
Public/Granted literature
- US20180145012A1 Robust Through-Silicon-Via Structure Public/Granted day:2018-05-24
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