Invention Grant
- Patent Title: Validation of a symbol response memory
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Application No.: US16030479Application Date: 2018-07-09
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Publication No.: US10402265B2Publication Date: 2019-09-03
- Inventor: Harold B Noyes , David R. Brown , Paul Glendenning
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Fletcher Yoder, P.C.
- Main IPC: G11C29/00
- IPC: G11C29/00 ; G06F11/10 ; H03M13/09

Abstract:
Configuration content of electronic devices used for data analysis may be altered due to bit failure or corruption, for example. Accordingly, in one embodiment, a device includes a plurality of blocks, each block of the plurality of blocks includes a plurality of rows, each row of the plurality of rows includes a plurality of configurable elements, each configurable element of the plurality of configurable elements includes a data analysis element including a memory component programmed with configuration data. The data analysis element is configured to analyze at least a portion of a data stream based on the configuration data and to output a result of the analysis. The device also includes an error detection engine (EDE) configured to perform integrity validation of the configuration data.
Public/Granted literature
- US20180322006A1 VALIDATION OF A SYMBOL RESPONSE MEMORY Public/Granted day:2018-11-08
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