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    SYSTEMS AND DEVICES FOR ACCESSING A STATE MACHINE
    1.
    发明申请
    SYSTEMS AND DEVICES FOR ACCESSING A STATE MACHINE 有权

    公开(公告)号：US20250165265A1

    公开(公告)日：2025-05-22

    申请号：US19025565

    申请日：2025-01-16

    Applicant: Micron Technology, Inc.

    Inventor： Harold B Noyes ,  David R. Brown ,  Paul Glendenning

    IPC: G06F9/448 ,  G06F13/12 ,  G06F13/16 ,  G06F13/28 ,  G06F13/38 ,  G06F13/42

    Abstract: A system includes a primary device comprising a first state machine lattice comprising a first plurality of configurable elements configured to analyze at least a portion of first data as a first analysis and to output a result of the first analysis. The system also includes a secondary device coupled to the primary device, wherein the secondary device comprises a second plurality of configurable elements configured to analyze at least a portion of second data received from the primary device as a second analysis and to output a result of the second analysis, wherein the primary device

    Bus translator
    5.
    发明授权
    Bus translator 有权

    公开(公告)号：US10915774B2

    公开(公告)日：2021-02-09

    申请号：US16514449

    申请日：2019-07-17

    Applicant: Micron Technology, Inc.

    Inventor： Harold B Noyes ,  Steven P. King

    IPC: G06F13/40 ,  G06K9/00 ,  G06F16/9032

    Abstract: Disclosed are methods and devices, among which is a device including a bus translator. In some embodiments, the device also includes a core module and a core bus coupled to the core module. The bus translator may be coupled to the core module via the core bus, and the bus translator may be configured to translate between signals from a selected one of a plurality of different types of buses and signals on the core bus.

    METHODS AND SYSTEMS FOR DATA ANALYSIS IN A STATE MACHINE
    6.
    发明申请
    METHODS AND SYSTEMS FOR DATA ANALYSIS IN A STATE MACHINE 审中-公开

    公开(公告)号：US20200334533A1

    公开(公告)日：2020-10-22

    申请号：US16917221

    申请日：2020-06-30

    Applicant: Micron Technology, Inc.

    Inventor： David R. Brown ,  Harold B Noyes

    IPC: G06N3/08 ,  G06K9/00 ,  G06N3/063

    Abstract: A device includes a match element that includes a first data input configured to receive a first result, wherein the first result is of an analysis performed on at least a portion of a data stream by an element of a state machine. The match element also includes a second data input configured to receive a second result, wherein the second result is of an analysis performed on at least a portion of the data stream by another element of the state machine. The match element further includes an output configured to selectively provide the first result or the second result.

    System and method for individual addressing
    7.
    发明授权
    System and method for individual addressing 有权

    公开(公告)号：US10789182B2

    公开(公告)日：2020-09-29

    申请号：US16726523

    申请日：2019-12-24

    Applicant: Micron Technology, Inc.

    Inventor： Debra Bell ,  Paul Glendenning ,  David R. Brown ,  Harold B Noyes

    IPC: G06F15/00 ,  G06F13/12 ,  G06F13/28 ,  G06F13/40

    Abstract: In one embodiment, a system includes a bus interface including a first processor, an indirect address storage storing a number of indirect addresses, and a direct address storage storing a number of direct addresses. The system also includes a number of devices connected to the bus interface and configured to analyze data. Each device of the number of devices includes a state machine engine. The bus interface is configured to receive a command from a second processor and to transmit an address for loading into the state machine engine of at least one device of the number of devices. The address includes a first address from the number of indirect addresses or a second address from the number of direct addresses.

    BUS TRANSLATOR
    9.
    发明申请
    BUS TRANSLATOR 审中-公开

    公开(公告)号：US20190340454A1

    公开(公告)日：2019-11-07

    申请号：US16514449

    申请日：2019-07-17

    Applicant: Micron Technology, Inc.

    Inventor： Harold B Noyes ,  Steven P. King

    IPC: G06K9/00 ,  G06F16/9032

    Abstract: Disclosed are methods and devices, among which is a device including a bus translator. In some embodiments, the device also includes a core module and a core bus coupled to the core module. The bus translator may be coupled to the core module via the core bus, and the bus translator may be configured to translate between signals from a selected one of a plurality of different types of buses and signals on the core bus.

    Systems and methods to enable identification of different data sets
    10.
    发明授权
    Systems and methods to enable identification of different data sets 有权

    公开(公告)号：US10466966B2

    公开(公告)日：2019-11-05

    申请号：US16017387

    申请日：2018-06-25

    Applicant: Micron Technology, Inc.

    Inventor： Harold B Noyes

    IPC: G06F7/02 ,  G06F5/06

    Abstract: Systems and methods are provided, such as those that enable identification of data flows and corresponding results in a pattern-recognition processor. In one embodiment, a system may include the pattern-recognition processor and a flow identification register, wherein a unique flow identifier for each data flow is stored in the register. The system may include a results buffer that stores the results data and the flow identifier for each data flow, so that the results data may be related to a specific data flow.

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