Invention Grant
- Patent Title: Issuing instructions to multiple execution units
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Application No.: US15891094Application Date: 2018-02-07
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Publication No.: US10409608B2Publication Date: 2019-09-10
- Inventor: Martin Vorbach , Frank May , Markus Weinhardt
- Applicant: Hyperion Core, Inc.
- Applicant Address: US CA Los Gatos
- Assignee: Hyperion Core, Inc.
- Current Assignee: Hyperion Core, Inc.
- Current Assignee Address: US CA Los Gatos
- Agency: IP Spring
- Priority: EP08018039 20081015; EP08019266 20081104; EP08020167 20081119; EP09000492 20090115; EP09003744 20090316; EP09008859 20090707
- Main IPC: G06F9/38
- IPC: G06F9/38 ; G06F8/41 ; G06F9/30
Abstract:
A single chip sequential processor comprising at least one ALU-Block, where said sequential processor is capable of maintaining its op-codes while processing data such as to overcome the necessity of requiring a new instruction in every clock cycle.
Public/Granted literature
- US20180181403A1 ISSUING INSTRUCTIONS TO MULTIPLE EXECUTION UNITS Public/Granted day:2018-06-28
Information query
