Invention Grant
- Patent Title: Wiring structure, semiconductor package structure and semiconductor process
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Application No.: US15387018Application Date: 2016-12-21
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Publication No.: US10424539B2Publication Date: 2019-09-24
- Inventor: Wen-Long Lu , Ching Kuo Hsu
- Applicant: Advanced Semiconductor Engineering, Inc.
- Applicant Address: TW Kaohsiung
- Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
- Current Assignee Address: TW Kaohsiung
- Agency: Foley & Lardner LLP
- Agent Cliff Z. Liu
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L23/498 ; H01L23/00 ; H01L21/48 ; H01L23/31

Abstract:
A wiring structure includes a main body, a first dielectric layer, a first circuit layer and a second dielectric layer. The first dielectric layer is disposed on the main body, and defines a plurality of first grooves and at least one receiving portion between two first grooves. The first circuit layer is disposed on the first dielectric layer, and includes at least one first conductive trace disposed on the receiving portion. A width of the first conductive trace is less than a width of the receiving portion. A second dielectric layer disposed on the first dielectric layer, and extends into the first grooves.
Public/Granted literature
- US20180174954A1 WIRING STRUCTURE, SEMICONDUCTOR PACKAGE STRUCTURE AND SEMICONDUCTOR PROCESS Public/Granted day:2018-06-21
Information query
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