Invention Grant
- Patent Title: Semiconductor device and manufacturing method thereof
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Application No.: US16032388Application Date: 2018-07-11
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Publication No.: US10424591B2Publication Date: 2019-09-24
- Inventor: Tamotsu Ogata
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Tokyo
- Agency: Mattingly & Malur, PC
- Priority: JP2017-179011 20170919
- Main IPC: H01L21/762
- IPC: H01L21/762 ; H01L27/11573 ; H01L27/11526 ; H01L29/423 ; H01L21/02 ; H01L23/532 ; H01L21/768 ; H01L27/118 ; H01L21/8234

Abstract:
In a memory cell region of a semiconductor device, a memory active region is defined by an element isolation insulating film. In the memory cell region, the position of the upper surface of the element isolation insulating film is set to be lower than the position of the main surface of a semiconductor substrate. A buried silicon nitride film and an etching stopper film are formed over the element isolation insulating film. The position of the upper surface of the etching stopper film is higher than that of the upper surface of the element isolation insulating film defining a peripheral active region.
Public/Granted literature
- US20190088670A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2019-03-21
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