Write level arbiter circuitry
Abstract:
Devices and methods include utilizing memory including a group of storage elements, such as memory banks. A command interface is configured to receive a write command to write data to the memory. A data strobe is received to assist in writing the data to the memory. Phase division circuitry is configured to divide the data strobe into a plurality of phases to be used in writing the data to the memory. Arbiter circuitry is configured to detect which phase of the plurality of phases captures a write start signal for the write command.
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