Invention Grant
- Patent Title: Auto test grouping/clock sequencing for at-speed test
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Application No.: US14886739Application Date: 2015-10-19
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Publication No.: US10436837B2Publication Date: 2019-10-08
- Inventor: Hardik P. Bhagat , Mark R. Taylor , Baalaji Konda Ramamoorthy , Douglas E. Sprague , Greeshma Jayakumar
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Roberts Mlotkowski Safran Cole & Calderon, P.C.
- Agent Michael Le Strange; Andrew M. Calderon
- Main IPC: G01R31/317
- IPC: G01R31/317 ; G01R31/327
Abstract:
A method includes: defining a plurality of clock architecture attributes for a plurality of clock domains to be tested; assigning each one of the plurality of clock domains to a first test group; and refining the assignment of each one of the plurality of clock domains based on the plurality of clock architecture attributes until each of the plurality of clock domains is grouped into a current test group.
Public/Granted literature
- US20170108549A1 AUTO TEST GROUPING/CLOCK SEQUENCING FOR AT-SPEED TEST Public/Granted day:2017-04-20
Information query
