公开(公告)号：US10436837B2

公开(公告)日：2019-10-08

申请号：US14886739

申请日：2015-10-19

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Hardik P. Bhagat ,  Mark R. Taylor ,  Baalaji Konda Ramamoorthy ,  Douglas E. Sprague ,  Greeshma Jayakumar

IPC: G01R31/317 ,  G01R31/327

Abstract: A method includes: defining a plurality of clock architecture attributes for a plurality of clock domains to be tested; assigning each one of the plurality of clock domains to a first test group; and refining the assignment of each one of the plurality of clock domains based on the plurality of clock architecture attributes until each of the plurality of clock domains is grouped into a current test group.

公开(公告)号：US20170108549A1

公开(公告)日：2017-04-20

申请号：US14886739

申请日：2015-10-19

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Hardik P. BHAGAT ,  Mark R. TAYLOR ,  Baalaji Konda Ramamoorthy ,  Douglas E. Sprague ,  Greeshma Jayakumar

IPC: G01R31/317 ,  G01R31/3177

CPC classification number: G01R31/31727

Abstract: a method includes: defining a plurality of clock architecture attributes for a plurality of clock domains to be tested; assigning each one of the plurality of clock domains to a first test group; and refining the assignment of each one of the plurality of clock domains based on the plurality of clock architecture attributes until each of the plurality of clock domains is grouped into a current test group.