Invention Grant
- Patent Title: Apparatuses and methods for storing redundancy repair information for memories
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Application No.: US15681143Application Date: 2017-08-18
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Publication No.: US10443531B2Publication Date: 2019-10-15
- Inventor: Christopher Morzano
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: G11C29/00
- IPC: G11C29/00 ; F02D41/24 ; G11C29/02 ; G06F12/06 ; G11C17/16 ; G11C29/44

Abstract:
Apparatuses and methods for storing redundancy repair information for memories are disclosed. An example apparatus includes a fuse array, a repair plane, and a decode logic and control circuit. The fuse array stores repair information that includes repair commands and load repair addresses. The load repair addresses include a respective repair address. The repair plane includes a block of memory and repair logic. The block of memory includes a plurality of redundant memory and the repair logic includes a plurality of repair blocks. Each repair block is associated with a respective one of the plurality of redundant memory and each repair block of the plurality of repair blocks stores a repair address. The decode logic and control circuit reads the repair information and decodes the repair commands, and loads repair addresses into the plurality of repair blocks based at least in part on the decoded repair commands.
Public/Granted literature
- US20190055895A1 APPARATUSES AND METHODS FOR STORING REDUNDANCY REPAIR INFORMATION FOR MEMORIES Public/Granted day:2019-02-21
Information query