Invention Grant
- Patent Title: Battery balance management circuit
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Application No.: US15848177Application Date: 2017-12-20
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Publication No.: US10444295B2Publication Date: 2019-10-15
- Inventor: Shu-Hsien Wen , Kuo-Kuang Jen , Gwo-Huei You , Chung-Ling Tseng
- Applicant: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY
- Applicant Address: TW Taoyuan
- Assignee: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY
- Current Assignee: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY
- Current Assignee Address: TW Taoyuan
- Agency: WPAT, PC
- Main IPC: H02J7/00
- IPC: H02J7/00 ; G01R31/387 ; H01M10/42 ; H01M10/44

Abstract:
A battery balance management circuit includes an active and passive testing balance bus, a plurality of battery sets, a primary charging converter, a secondary charging system, an electrical load and a battery management system. An external balance management mechanism is utilized to compensate for current loss of the battery set, effectively enabling the battery sets to provide stable large current output.
Public/Granted literature
- US20190187213A1 BATTERY BALANCE MANAGEMENT CIRCUIT Public/Granted day:2019-06-20
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