Invention Grant
- Patent Title: Reset attack detection
-
Application No.: US15635614Application Date: 2017-06-28
-
Publication No.: US10445500B2Publication Date: 2019-10-15
- Inventor: Guillaume Schon , Frederic Jean Denis Arsanto , Jocelyn François Orion Jaubert , Carlo Dario Fanara
- Applicant: ARM Limited
- Applicant Address: GB Cambridge
- Assignee: ARM Limited
- Current Assignee: ARM Limited
- Current Assignee Address: GB Cambridge
- Agency: Nixon & Vanderhye P.C.
- Main IPC: G06F21/56
- IPC: G06F21/56 ; G06F3/06 ; G06F21/62 ; G06F21/78 ; G06F21/57

Abstract:
An apparatus has a number of data holding elements for holding data values which are reset to a reset value in response to a transition of a signal at a reset signal input of the data holding element from a first value to a second value. A reset tree is provided to distribute a reset signal received at root node of the reset tree to the reset signal inputs of the data holding elements. At least one reset attack detection element is provided, with its reset signal input coupled to a given node of the reset tree, to assert an error signal when its reset signal input transitions from the first value to a second value. Reset error clearing circuitry triggers clearing of the error signal, when the reset signal at the root node of the reset tree transitions from the second value to the first value.
Public/Granted literature
- US20190005240A1 RESET ATTACK DETECTION Public/Granted day:2019-01-03
Information query