- Patent Title: Memory circuitry comprising a vertical string of memory cells and a conductive via and method used in forming a vertical string of memory cells and a conductive via
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Application No.: US15170114Application Date: 2016-06-01
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Publication No.: US10446571B2Publication Date: 2019-10-15
- Inventor: Hongbin Zhu , Gurtej S. Sandhu , Kunal R. Parekh
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L27/11582
- IPC: H01L27/11582 ; H01L27/105 ; H01L27/1157 ; H01L27/11521 ; H01L27/11556 ; H01L27/11568 ; H01L27/11573
Abstract:
A method used in forming a vertical string of memory cells and a conductive via comprises forming a first lower opening and a second lower opening into a lower material. A first material is formed within the first and second lower openings. An upper material is formed above the lower material and above the first material in the first and second lower openings. A first upper opening is formed through the upper material to the first material in the first lower opening. At least a majority of the first material is removed from the first lower opening through the first upper opening and channel material is formed within the first lower and first upper openings for the vertical string of memory cells being formed. After forming the channel material, a second upper opening is formed through the upper material to the first material in the second lower opening. Conductive material of the conductive via is formed within the second upper opening. Structure embodiments independent of method of formation are disclosed.
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