Invention Grant
- Patent Title: Method for manufacturing a circuit having a lamination layer using laser direct structuring process
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Application No.: US15170943Application Date: 2016-06-02
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Publication No.: US10448518B2Publication Date: 2019-10-15
- Inventor: Seung Hyuk Choi , Hyun Jun Hong , Tae Wook Kim , Cheong Ho Ryu , Young Sang Kim , Sung Jun Kim
- Applicant: ETHERTRONICS, INC.
- Applicant Address: US CA San Diego
- Assignee: Ethertronics, Inc.
- Current Assignee: Ethertronics, Inc.
- Current Assignee Address: US CA San Diego
- Agency: Dority & Manning, P.A.
- Priority: KR10-2015-0078172 20150602
- Main IPC: H05K3/46
- IPC: H05K3/46 ; H05K3/18 ; H05K3/00 ; H05K3/28 ; H05K3/42

Abstract:
The present subject matter relates to the method of manufacturing circuit having lamination layer using LDS (Laser Direct Structuring) to ease the application on surface structure for applied product of various electronic circuit and particularly, in which can form circuit structure of single-layer to multiple-layer on the surface of injection-molded substrate in the shape of plane or curved surface, metal product, glasses, ceramic, rubber or other material.
Public/Granted literature
- US20170094801A1 METHOD FOR MANUFACTURING A CIRCUIT HAVING A LAMINATION LAYER USING LASER DIRECT STRUCTURING PROCESS Public/Granted day:2017-03-30
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