The present application discloses an array substrate comprising a plurality of gate lines and a plurality of data lines crossing over each other thereby defining an array of a plurality of sub-pixel areas, each sub-pixel area comprising a pixel electrode and multiple switching transistors having respective gate electrodes coupled to multiple different gate lines, wherein the pixel electrode is configured to be charged by a data signal from a data line only with all the multiple switching transistors being turned on concurrently during a pixel electrode charging period by an effective voltage level applied on the respective multiple different gate lines.