Embodiments of the present disclosure provide a memory device. The memory device includes an RRAM crossbar array that is configured to perform a logic operation, and resistance values of resistors in the RRAM crossbar array are all set to Ron or Roff to indicate a value 1 or 0. Based on the foregoing setting, an operation is implemented using the RRAM crossbar array, so that reliability of a logic operation of the RRAM crossbar array can be improved.