- 专利标题: Loop code processor optimizations
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申请号: US14986465申请日: 2015-12-31
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公开(公告)号: US10459727B2公开(公告)日: 2019-10-29
- 发明人: Trishul A Chilimbi , Olatunji Ruwase , Vivek Seshadri
- 申请人: Microsoft Technology Licensing, LLC
- 申请人地址: US WA Redmond
- 专利权人: Microsoft Technology Licensing, LLC
- 当前专利权人: Microsoft Technology Licensing, LLC
- 当前专利权人地址: US WA Redmond
- 代理机构: Schwegman Lundberg & Woessner, P.A.
- 主分类号: G06F9/30
- IPC分类号: G06F9/30 ; G06F9/38 ; G06F12/0875 ; G06F9/32 ; G06N3/02
摘要:
Loop code processor optimizations are implemented as a loop optimizer extension to a processor pipeline. The loop optimizer generates optimized code associated with code loops that include at least one zero-optimizable instruction. The loop optimizer may generate multiple versions of optimized code associated with a particular code loop, where each of the multiple version of optimized code has a different associated condition under which the optimized code can be safely executed.
公开/授权文献
- US20170192787A1 LOOP CODE PROCESSOR OPTIMIZATIONS 公开/授权日:2017-07-06
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