A semiconductor system includes a medium controller and a semiconductor module. The medium controller outputs an address that is sequentially counted in a test mode, senses levels of data corresponding to the address in the test mode to determine if the data has a row error or a chip error, and changes a combination of a host address to generate and store a spare address if a combination of the address corresponds to the chip error in the test mode. The semiconductor module includes a plurality of semiconductor devices. The semiconductor module repairs the address to output the data from a redundancy area if a combination of the address corresponds to the row error. The semiconductor module outputs the data from a spare area selected by the spare address if a combination of the address corresponds to the chip error.