Invention Grant
- Patent Title: Semiconductor device including via plug and method of forming the same
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Application No.: US16008319Application Date: 2018-06-14
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Publication No.: US10461027B2Publication Date: 2019-10-29
- Inventor: Eui Bok Lee , Jong Min Baek , Sang Hoon Ahn , Hyeok Sang Oh
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Lee & Morse, P.C.
- Priority: KR10-2018-0015029 20180207
- Main IPC: H01L23/58
- IPC: H01L23/58 ; H01L23/522 ; H01L21/768 ; H01L21/02 ; H01L23/532
Abstract:
A semiconductor device includes a lower insulating layer disposed on a substrate. A conductive pattern is formed in the lower insulating layer. A middle insulating layer is disposed on the lower insulating layer and the conductive pattern. A via control region is formed in the middle insulating layer. An upper insulating layer is disposed on the middle insulating layer and the via control region. A via plug is formed to pass through the via control region and to be connected to the conductive pattern. The via control region has a lower etch rate than the middle insulating layer.
Public/Granted literature
- US20190244896A1 SEMICONDUCTOR DEVICE INCLUDING VIA PLUG AND METHOD OF FORMING THE SAME Public/Granted day:2019-08-08
Information query
IPC分类:
