Invention Grant
- Patent Title: Semiconductor structure and method for manufacturing semiconductor structure
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Application No.: US15848600Application Date: 2017-12-20
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Publication No.: US10461117B2Publication Date: 2019-10-29
- Inventor: Yen-Shih Ho , Tsang-Yu Liu , Chia-Sheng Lin , Chaung-Lin Lai
- Applicant: XINTEC INC.
- Applicant Address: TW Taoyuan
- Assignee: XINTEC INC.
- Current Assignee: XINTEC INC.
- Current Assignee Address: TW Taoyuan
- Agency: Liu & Liu
- Main IPC: H01L27/146
- IPC: H01L27/146 ; H01L21/683 ; H01L23/00

Abstract:
A method for manufacturing a semiconductor structure includes the following steps. A first carrier is adhered to a first surface of a wafer by a first temporary bonding layer. A second surface of the wafer facing away from the first carrier is etched to form at least one through hole and at least one trench, in which a conductive pad of the wafer is exposed through the through hole. An isolation layer is formed on the second surface of the wafer, a sidewall of the through hole, and a sidewall of the trench. A second carrier is adhered to the second surface of the wafer by a second temporary bonding layer, and thus the through hole and the trench are covered by the second carrier. The first carrier and the first temporary bonding layer are removed.
Public/Granted literature
- US20180175101A1 SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE Public/Granted day:2018-06-21
Information query
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