Invention Grant
- Patent Title: Localized strain relief for an integrated circuit
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Application No.: US15288502Application Date: 2016-10-07
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Publication No.: US10461151B2Publication Date: 2019-10-29
- Inventor: Patrick F. M. Poucher , Padraig L. Fitzgerald , John Jude O'Donnell , Oliver J. Kierse , Denis M. O'Connor
- Applicant: ANALOG DEVICES GLOBAL
- Applicant Address: BM Hamilton
- Assignee: Analog Devices Global
- Current Assignee: Analog Devices Global
- Current Assignee Address: BM Hamilton
- Agency: Knobbe, Martens, Olson & Bear, LLP
- Main IPC: H01L23/12
- IPC: H01L23/12 ; H01L29/06 ; H01L21/764 ; H01L23/00 ; H01L23/16 ; H01L23/31

Abstract:
An integrated circuit may include a semiconductor die having a trench formed in a surface of the semiconductor die. One or more circuit components may be formed on the surface of the semiconductor die. The trench can extend into the semiconductor die next to at least one circuit component. The trench may surround the circuit component partially or wholly. The trench may be filled with a material having a lower bulk modulus than the semiconductor die in which the trench is formed.
Public/Granted literature
- US20170025497A1 LOCALIZED STRAIN RELIEF FOR AN INTEGRATED CIRCUIT Public/Granted day:2017-01-26
Information query
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