发明授权
- 专利标题: Word-line pre-charging in power-on read operation to reduce programming voltage leakage
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申请号: US15844037申请日: 2017-12-15
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公开(公告)号: US10475493B2公开(公告)日: 2019-11-12
- 发明人: Manabu Sakai , Qui Vi Nguyen , Yen-Lung Li
- 申请人: SanDisk Technologies LLC
- 申请人地址: US TX Plano
- 专利权人: SanDisk Technologies LLC
- 当前专利权人: SanDisk Technologies LLC
- 当前专利权人地址: US TX Plano
- 代理机构: Foley & Lardner LLP
- 主分类号: G11C8/08
- IPC分类号: G11C8/08 ; G11C16/08 ; G11C5/14 ; G11C16/26 ; G11C16/30 ; G11C16/04
摘要:
This disclosure provides techniques for reducing leakage current in a non-volatile memory that does not include a local interconnect. In one example, a low-voltage pulse can be applied to all of the word-lines in all of the blocks of the non-volatile memory. The low-voltage pulse can be applied during a period in which the row decoder is typically idle in order to reduce the total amount of time required to program the non-volatile memory. After the conclusion low-voltage pulse, a global control line voltage can be applied at about the same level as the low-voltage pulse to keep the word-lines floating when the pulse is no longer applied.
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