A power-on reset (POR) circuit includes: a signal generator circuit for generating a first and a second signal according to an input voltage, and a comparator circuit. The comparator circuit, having a non-zero input offset, includes a first MOS transistor with a first conductive type and having a first conductive type gate and a first threshold voltage, and a second MOS transistor with a first conductive type and having a second conductive type gate and a second threshold voltage. The input offset relates to a difference between the first and the second threshold voltage. The first and the second signal control the first and the second MOS transistors respectively to generate a POR signal. When the input voltage exceeds a POR threshold which relates to a predetermined multiple or ratio of the input offset, the POR signal transits its state.