A shadow command ring is described for graphics processor virtualization. In one example a command batch is loaded from a virtual machine of a general purpose processor into a physical command ring of a graphics processor. A physical tail pointer register of the graphics processor is set and the command batch and the physical tail pointer are trapped at a mediator. The mediator copies the trapped command batch and the physical tail pointer in a shadow command ring and sets a virtual tail pointer. The execution of the physical command ring is monitored and if an error is determined then the physical command ring is cleared and reloaded using the shadow command ring.