- Patent Title: Memory device for performing parallel read-modify-write operation
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Application No.: US15925111Application Date: 2018-03-19
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Publication No.: US10521293B2Publication Date: 2019-12-31
- Inventor: Sang-uhn Cha , In-woo Jun
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel, P.A.
- Priority: KR10-2017-0119661 20170918
- Main IPC: G06F11/10
- IPC: G06F11/10

Abstract:
A memory device is configured to perform a parallel read-modify-write operation, which generates a syndrome for first partial data read from a memory cell array and second partial data according to a data mask option, corrects an error of the second partial data, generates merged data by combining second data with the corrected second partial data, and generates an internal parity for the merged data. The memory device sets the second partial data to binary values of 0, generates third data by combining the second partial data set to the binary values of 0 with the second data, generates a third parity for the third data, and generates an internal parity for the merged data based on the syndrome, a partial parity, and the third parity.
Public/Granted literature
- US20190087263A1 MEMORY DEVICE FOR PERFORMING PARALLEL READ-MODIFY-WRITE OPERATION Public/Granted day:2019-03-21
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