MEMORY DEVICE FOR PERFORMING PARALLEL READ-MODIFY-WRITE OPERATION

    公开(公告)号:US20190087263A1

    公开(公告)日:2019-03-21

    申请号:US15925111

    申请日:2018-03-19

    CPC classification number: G06F11/1048 G06F11/1044 G06F11/1072

    Abstract: A memory device is configured to perform a parallel read-modify-write operation, which generates a syndrome for first partial data read from a memory cell array and second partial data according to a data mask option, corrects an error of the second partial data, generates merged data by combining second data with the corrected second partial data, and generates an internal parity for the merged data. The memory device sets the second partial data to binary values of 0, generates third data by combining the second partial data set to the binary values of 0 with the second data, generates a third parity for the third data, and generates an internal parity for the merged data based on the syndrome, a partial parity, and the third parity.

    Memory device for performing parallel read-modify-write operation

    公开(公告)号:US10521293B2

    公开(公告)日:2019-12-31

    申请号:US15925111

    申请日:2018-03-19

    Abstract: A memory device is configured to perform a parallel read-modify-write operation, which generates a syndrome for first partial data read from a memory cell array and second partial data according to a data mask option, corrects an error of the second partial data, generates merged data by combining second data with the corrected second partial data, and generates an internal parity for the merged data. The memory device sets the second partial data to binary values of 0, generates third data by combining the second partial data set to the binary values of 0 with the second data, generates a third parity for the third data, and generates an internal parity for the merged data based on the syndrome, a partial parity, and the third parity.

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