A controller for a memory system is disclosed. The controller includes logic configured to execute host requests and memory management operations. The memory management operations have a plurality of memory command cycles. The logic is configured to suspend the memory management operation upon completion of a memory command cycle in the plurality of memory command cycles before a final stage when a host read request is received during execution of the memory management operation, and configured to continue the memory management operation when a host request other than a read request is received during execution of the memory management operation.