Invention Grant
- Patent Title: Vertical semiconductor devices
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Application No.: US15964207Application Date: 2018-04-27
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Publication No.: US10529865B2Publication Date: 2020-01-07
- Inventor: Joon-Young Kwon , Shin-Young Kim , Yoon-Hwan Son , Jae-Jung Lee , Joon-Sung Kim , Seung-Min Lee
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-Do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si, Gyeonggi-Do
- Agency: F. Chau & Associate, LLC
- Priority: KR10-2017-0096992 20170731
- Main IPC: H01L29/792
- IPC: H01L29/792 ; H01L27/11582 ; H01L29/66 ; H01L27/11565 ; H01L27/11575

Abstract:
A vertical memory device may include a conductive pattern structure, a pad structure, a plurality of channel structures, a plurality of first dummy structures and a plurality of second dummy structures. The conductive pattern structure may be in a first region of a substrate, and may extend in a first direction. The pad structure may be in a second region of the substrate adjacent to each of opposite sides of the first region of the substrate, and may contact a side of the conductive pattern structure. The channel structures may extend through the conductive pattern structure, and may be regularly arranged on the substrate. The first dummy structures may extend through the conductive pattern structure, and may be disposed in a portion of the first region of the substrate adjacent to the second region thereof. The second dummy structures may extend through the pad structure on the substrate. Each of the channel structures may have a first width in the first direction, and each of the first dummy structures may have a second width in the first direction greater than the first width.
Public/Granted literature
- US20190035942A1 VERTICAL SEMICONDUCTOR DEVICES Public/Granted day:2019-01-31
Information query
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